Johannes Kepler University, Linz, Austria
Title: Challenges in Verifying Arithmetic Circuits Using Computer Algebra
Verifying arithmetic circuits such as multipliers and related circuits used to implement arithmetic units in processors or cryptographic functions remains an important problem, but in practice still requires
substantial manual effort. Out-of-the-box SAT solving does not work. It was even conjectured that proving such properties requires exponential resolution proofs. In this talk we want to focus on another line of research, which is applying computer algebra to verify properties of such circuits, most prominently properties of multiplier circuits. A recent approach based on polynomial reasoning made substantial progress in this regard. We are revisiting this approach, improve on some key aspects, and also lay out some future work.
Between 2000 and 2004 he held a position as Assistant Professor within the Department of Computer Science at ETH Zürich, Switzerland. In 1999 Biere was working for a start-up company in electronic design automation after one year as Post-Doc with Edmund Clarke at CMU, Pittsburgh, USA. In 1997 Biere received a Ph.D. in Computer Science from the University of Karlsruhe, Germany.
His primary research interests are applied formal methods, more specifically formal verification of hardware and software, using model checking, propositional and related techniques. He is the author and co-author of more than 120 papers and served on the program committee of more than 110 international conferences and workshops. His most influential work is his contribution to Bounded Model Checking. Decision procedures for SAT, QBF and SMT, developed by him or under his guidance rank at the top many international competitions and were awarded 57 medals including 32 gold medals. He is a recipient of an IBM faculty award in 2012, received the TACAS most influential in the first 20 years of TACAS in 2014, and the ETAPS 2017 Test of Time Award.
Besides organizing several workshops Armin Biere was co-chair of SAT’06, and FMCAD’09, was PC co-chair of HVC’12, and co-chair of CAV’14. He serves on the editorial boards of the Journal on Satisfiability, Boolean Modeling and Computation (JSAT), the Journal of Automated Reasoning (JAR), and the journal for Formal Methods in System Design (FMSD).
He is an editor of the Handbook of Satisfiability and initiated and organizes the Hardware Model Checking Competition (HWMCC). Since 2011 he serves as chair of the SAT Association and since 2012 on the steering committee of FMCAD. In 2006 Armin Biere co-founded NextOp Software Inc. which was acquired by Atrenta Inc. in 2012.